Cisco Silicon One
Agentic LLMs, RAG, fine-tuning, and production AI infrastructure for silicon engineering.
Agentic AI for silicon engineering
System overview
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Continue to project detailsA high-level view of AI engineering work at Cisco Silicon One. Domain-specific RAG supports agentic LLM workflows for physical design, design for test and memory built-in self-test. Fine-tuning, model serving and AI infrastructure support specialized engineering workloads. Production operations and AIOps cover deployment, monitoring, troubleshooting and reliability.
Context
Senior AI Engineer building and operating AI systems for Cisco Silicon One. My work combines agentic LLM workflows, retrieval-augmented generation (RAG), LLM fine-tuning, AI infrastructure, and production operations across physical design (PD), design for test (DFT), and memory built-in self-test (MBIST).
Problem space
The work connects specialized silicon engineering tasks with domain-specific retrieval, model adaptation, and the infrastructure and operational requirements of production AI systems.
Solution architecture
Engineer agentic LLM workflows across physical design (PD), design for test (DFT), and memory built-in self-test (MBIST) in Cisco Silicon One chip engineering.
Build retrieval-augmented generation (RAG) systems for domain-specific retrieval and LLM-assisted engineering workflows.
Fine-tune and adapt LLMs for specialized silicon engineering tasks.
Develop and maintain AI infrastructure supporting model serving, RAG systems, and agentic workloads.
Handle production AI operations, including deployment, monitoring, troubleshooting, and reliability through AIOps practices.
Technology stack
- Agentic AI
- LLMs
- RAG
- LLM fine-tuning
- AI infrastructure
- AIOps
- Production AI operations
- Physical design (PD)
- Design for test (DFT)
- Memory built-in self-test (MBIST)